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AD5113 Scheda tecnica(PDF) 5 Page - Analog Devices |
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AD5113 Scheda tecnica(HTML) 5 Page - Analog Devices |
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5 / 16 page ![]() Data Sheet AD5116 Rev. B | Page 5 of 16 INTERFACE TIMING SPECIFICATIONS VDD = 2.3 V to 5.5 V; all specifications TMIN to TMAX, unless otherwise noted. Table 3. Parameter Test Conditions/Comments Min Typ Max Unit Description t 1 8 ms Debounce time t 2 1 sec Manual to auto scan time t 3 140 ms Auto scan step t 4 ASE = 0 V, PD = GND, PU = GND 1 sec Auto save execute time t 5 ASE = VDD 8 ms Low pulse time to manual storage t EEPROM_PROGRAM 1 15 50 ms Memory program time t POWER_UP 2 50 µs Power-on EEPROM restore time 1 EEPROM program time depends on the temperature and EEPROM write cycles. Higher timing is expected at a lower temperature and higher write cycles. 2 Maximum time after V DD is equal to 2.3 V. TIMING DIAGRAMS PU RW t1 PD (LOW) Figure 2. Manual Increment Mode Timing PU t1 t2 t3 PD (LOW) RW Figure 3. Auto Increment Mode Timing PD t1 t4 EEPROM DATA NEW DATA tEEPROM PROGRAM RW ASE (LOW) Figure 4. Auto Save Mode Timing PD/PU (LOW) t5 EEPROM DATA NEW DATA tEEPROM PROGRAM ASE Figure 5. Manual Save Mode Timing PD t1 RW RW = 45Ω ASE Figure 6. End Scale Indication Timing |
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