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QAMI5107 Scheda tecnica(PDF) 2 Page - STMicroelectronics

Il numero della parte QAMI5107
Spiegazioni elettronici  Low-cost QAM demodulator and MPEG2 decoder SOC for set-top boxes
PDF  6 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

QAMI5107 Scheda tecnica(HTML) 2 Page - STMicroelectronics

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Description
QAMi5107
2/6
1
Description
The QAMi5107 provides an integrated demodulator/decoder solution for digital cable
receivers for compressed video, sound and data services. A QAM (quadrature amplitude
modulation) demodulator and FEC performs IF to MPEG-2 block processing of QAM
carriers. The demodulated stream is then processed by video and audio decoders.
The device implements a fully unified SDR SDRAM based memory architecture that
integrates the Omega2 video decoder cell together with a blitter engine and a multichannel
DMA controller to provide enhanced performance for graphics and real-time stream
transfers. Transfer of data such as pixmaps, audio streams, stills and PES can be performed
efficiently using the QAMi5107 DMA.
A true-color mode provides OSD graphics allowing the display of RGB16 formats: RGB565,
ARGB1555 and ARGB4444. This directly supports up to 65,536 colors in a region. Alpha
blending by region or by pixel is available for mixing with video and background layers. The
above feature set, guarantees a smooth user interface and high performance for demanding
middlewares such as MHP™.
The QAMi5107 is the first single chip cable STB IC to combine a very low cost solution with
advanced security features. DVB and ICAM descramblers together with a smart card
interface ensure that all the major conditional access systems can be supported.
1.1
QAM Demodulator features
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Decodes ITU-T J.83-Annexes A/C and DVB-C bit streams
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Processes Japanese transport stream multiplex frame (TSMF)
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High-performance integrated A/D converter suitable for direct IF architecture in all QAM
(quadrature amplitude modulation) modes
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Supports 16, 32, 64, 128 and 256 point constellations
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Very low power consumption
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Full digital demodulation
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Variable symbol rates
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Front derotator for better low symbol rate performance and relaxed tuner constraints
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Integrated matched filtering
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Robust integrated adaptive pre and post equalizer
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On-chip FEC A/C with ability to bypass individual blocks
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10 programmable GPIO
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Two AGC outputs suitable for delayed AGC applications (sigma-delta outputs)
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Integrated signal quality monitors, plus lock indicator and interrupt function mapped to
GPIO pin
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Improved signal acquisition
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System clock generated on-chip from quartz crystal
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Low frequency crystal operations 4, 16, 25 - 30 MHz
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4 I²C addresses
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Easy control and monitoring via 2-wire fast I2C bus



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