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TDA8002AT/3/C2 Scheda tecnica(PDF) 18 Page - NXP Semiconductors |
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TDA8002AT/3/C2 Scheda tecnica(HTML) 18 Page - NXP Semiconductors |
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18 / 28 page ![]() 1997 Nov 04 18 Philips Semiconductors Product specification IC card interface TDA8002 Notes 1. It may be necessary to put capacitors from XTAL1 and XTAL2 to ground depending on the choice of crystal or resonator. 2. When the oscillator is stopped in mode 1, XTAL1 is set to HIGH. 3. The transition time and duty cycle definitions are shown in Fig.13; 4. PRES and CMDVCC are active LOW; RSTIN and PRES are active HIGH. 5. CLKOUT transition time and duty cycle do not need to be tested. Strobe input (STROBE) fSTROBE frequency on STROBE 0 − 20 MHz VIL LOW-level input voltage 0 − 0.3VDD V VIH HIGH-level input voltage 0.7VDD − VDD V Logic inputs (CLKSEL, CLKDIV1, CLKDIV2, MODE, CMDVCC and RSTIN); note 4 VIL LOW-level input voltage 0 − 0.8 V VIH HIGH-level input voltage 1.8 − VDD V Logic inputs (PRES, PRES); note 4 VIL LOW-level input voltage 0 − 0.3VDD V VIH HIGH-level input voltage 0.7VDD − VDD V IIL(PRES) LOW-level input current on pin PRES VOL =0V −−−10 µA IIH(PRES) HIGH-level input current on pin PRES −− 10 µA Protections Tsd shut-down local temperature − 135 −°C ICC(sd) shut-down current at VCC −− 90 mA Timing tact activation sequence duration see Fig.9; guaranteed by design − 180 220 µs tde deactivation sequence duration see Fig.11; guaranteed by design 50 70 90 µs t3 start of the window for sending CLK to the card see Figs 8 and 9 −− 130 µs t5 end of the window for sending CLK to the card see Fig.8 150 −−µs SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT δ t 1 t 1 t 2 + --------------- = |
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