DS2430A

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MEMORY

The memory of the DS2430A consists of three separate sections, called data memory, application

register, and status register (Figure 5). The data memory and the application register each have its own

intermediate storage area called scratchpad that acts as a buffer when writing to the device. The data

memory can be read and written as often as desired. The application register, however, is one-time

programmable only. Once the application register is programmed, it is automatically write protected. The

status register will indicate if the application register is already locked or if it is still available for storing

data. As long as the application register is unprogrammed, the status register will read FFh. Copying data

from the register scratchpad to the application register will clear the 2 least significant bits of the status

register, yielding an FCh the next time one reads the status register.

DS2430A MEMORY MAP Figure 5

MEMORY FUNCTION COMMANDS

The Memory Function Flow Chart (Figure 6) describes the protocols necessary for accessing the different

memory sections of the DS2430A. An example is shown later in this document.

WRITE SCRATCHPAD [0Fh]

After issuing the Write Scratchpad command, the master must first provide a 1-byte address, followed by

the data to be written to the scratchpad for the data memory. The DS2430A will automatically increment

the address after every byte it received. After having received a data byte for address 1Fh, the address

counter will wrap around to 00h for the next byte and writing continues until the master sends a Reset

Pulse.

READ SCRATCHPAD [AAh]

This command is used to verify data previously written to the scratchpad before it is copied into the final

storage EEPROM memory. After issuing the Read Scratchpad command, the master must provide the 1-

byte starting address from where data is to be read. The DS2430A will automatically increment the

address after every byte read by the master. After the data of address 1Fh has been read, the address

counter will wrap around to 00h for the next byte and reading continues until the master sends a Reset

Pulse.