VREF+ is the analog peripheral input reference voltage, or the output of the internal voltage reference buffer (when

enabled).

•

When VDDA < 2 V, VREF+ must be equal to VDDA.

•

When VDDA ≥ 2 V, VREF+ must be between 2 V and VDDA. It can be grounded when the analog peripherals

using VREF+ are not active.

The device has an integrated power-on/power-down (POR/PDR) reset active in all power modes except shutdown

and ensures proper operation upon power-on and power-down. It maintains the device in reset when the supply

voltage is below the VPOR/PDR threshold, without the need for an external reset circuit.

Brownout reset (BOR) function allows extra flexibility. It can be enabled and configured through option bytes, by

selecting one of four thresholds for rising VDD and the other four for falling VDD.

The device also features an embedded programmable voltage detector (PVD) that monitors the VDD power

supply and compares it to the VPVD threshold. It allows generating an interrupt when the VDD level crosses the

VPVD threshold, selectively while falling, while rising, or while falling and rising. The interrupt service routine can

then generate a warning message and/or put the MCU into a safe state. The PVD is enabled by software.

The MCU supports three low-power modes to achieve the best compromise between low power consumption,

short startup time and available wake-up sources:

•

Sleep mode

In sleep mode, only the CPU is stopped. All peripherals continue to operate and can wake up the CPU

when an interrupt/event occurs.

•

Low-power run mode

The low-power run mode is achieved with VCORE supplied by the low-power regulator to minimize the

regulator's operating current.

•

Stop mode

In stop mode the device achieves low power consumption while retaining the content of SRAM and

registers.

•

Standby mode

The standby mode is used to achieve a very low power consumption with POR/PDR always active in

this mode.

The device exits standby mode when an external reset (NRST pin), IWDG reset event, wake-up event

(WKUP pin, configurable rising or falling edge) or RTC event (alarm, periodic wake-up, timestamp,

tamper), or when a failure is detected on LSE (CSS on LSE).

•

Shutdown mode

The shutdown mode is used to achieve the lowest power consumption. The BOR is not available in

shutdown mode. No power voltage monitoring is possible in this mode. Therefore, switching to an RTC

domain is not supported.

The device exits shutdown mode upon external reset event (NRST pin), IWDG reset event, wake-up

event (WKUP pin, configurable rising or falling edge) or RTC event (alarm, periodic wake-up,

timestamp, tamper).

STSPIN32G0601

Device description

DS14489 - Rev 1

page 21/30