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VL53L4ED Scheda tecnica(PDF) 5 Page - STMicroelectronics |
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VL53L4ED Scheda tecnica(HTML) 5 Page - STMicroelectronics |
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5 / 39 page ![]() 2.3 Device pinout The following figure shows the pinout of the VL53L4ED (see also Section 8: Outline drawings). Figure 2. VL53L4ED pinout (bottom view) AVDDVCSEL 2 AVSSVCSEL 3 GND 4 GND2 5 XSHUT 11 12 AVDD 10 SCL 9 SDA 8 DNC 7 GPIO1 6 1 GND3 GND4 Table 2. VL53L4ED pin description Pin number Signal name Signal type Signal description 1 AVDDVCSEL Supply VCSEL supply, to be connected to main supply 2 AVSSVCSEL Ground VCSEL ground, to be connected to main ground 3 GND To be connected to main ground 4 GND2 5 XSHUT Digital input Xshutdown pin, active low 6 GND3 Ground To be connected to main ground 7 GPIO1 Digital output Interrupt output. Open drain output 8 DNC Digital input Do not connect, must be left floating 9 SDA Digital input/output I²C serial data 10 SCL Digital input I²C serial clock input 11 AVDD Supply Supply, to be connected to main supply 12 GND4 Ground To be connected to, the main ground Note: AVSSVCSEL and GND are ground pins that can be connected in the application schematics. Note: GND2, GND3, and GND4 are standard pins that are forced to the ground domain in the application schematics. This is to avoid possible instabilities which might arise if set in other states. VL53L4ED Product overview DS14256 - Rev 3 page 5/39 |
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