DS2155 datasheet(2/238 Pages) DALLAS

2 / 238 page

DS2155

2 of 238

1. TABLE OF CONTENTS

TABLE OF CONTENTS ............................................................................................................................2

1.1

TABLE OF FIGURES ........................................................................................................................................6

1.2

TABLE OF TABLES..........................................................................................................................................7

DATA SHEET REVISION HISTORY .....................................................................................................8

MAIN FEATURES....................................................................................................................................10

3.1

FUNCTIONAL DESCRIPTION .........................................................................................................................13

3.2

BLOCK DIAGRAM.........................................................................................................................................15

PIN FUNCTION DESCRIPTION ...........................................................................................................19

4.1

TRANSMIT SIDE ...........................................................................................................................................19

4.2

RECEIVE SIDE ..............................................................................................................................................21

4.3

PARALLEL CONTROL PORT PINS .................................................................................................................24

4.4

EXTENDED SYSTEM INFORMATION BUS......................................................................................................25

4.5

USER OUTPUT PORT PINS ............................................................................................................................26

4.6

JTAG TEST ACCESS PORT PINS...................................................................................................................27

4.7

LINE INTERFACE PINS..................................................................................................................................28

4.8

SUPPLY PINS ................................................................................................................................................29

4.9

L AND G PACKAGE PINOUT.........................................................................................................................30

4.10

10MM CSBGA PIN CONFIGURATION ......................................................................................................32

PARALLEL PORT ...................................................................................................................................33

5.1

REGISTER MAP ............................................................................................................................................33

PROGRAMMING MODEL.....................................................................................................................39

6.1

POWER-UP SEQUENCE .................................................................................................................................40

6.1.1

Master Mode Register.........................................................................................................................40

6.2

INTERRUPT HANDLING ................................................................................................................................41

6.3

STATUS REGISTERS......................................................................................................................................41

6.4

INFORMATION REGISTERS ...........................................................................................................................42

6.5

INTERRUPT INFORMATION REGISTERS ........................................................................................................42

SPECIAL PER-CHANNEL REGISTER OPERATION.......................................................................43

CLOCK MAP ............................................................................................................................................45

T1 FRAMER/FORMATTER CONTROL AND STATUS REGISTERS............................................46

9.1

T1 CONTROL REGISTERS .............................................................................................................................46

9.2

T1 TRANSMIT TRANSPARENCY ...................................................................................................................51

9.3

AIS-CI AND RAI-CI GENERATION AND DETECTION ..................................................................................51

9.4

T1 RECEIVE-SIDE DIGITAL-MILLIWATT CODE GENERATION.....................................................................52

10.

E1 FRAMER/FORMATTER CONTROL AND STATUS REGISTERS............................................55

10.1

E1 CONTROL REGISTERS.........................................................................................................................55

10.2

AUTOMATIC ALARM GENERATION .........................................................................................................59

10.3

E1 INFORMATION REGISTERS..................................................................................................................60

11.

COMMON CONTROL AND STATUS REGISTERS ..........................................................................62

11.1

T1/E1 STATUS REGISTERS ......................................................................................................................63

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