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DSPIC30F2012AT30E/P Scheda tecnica(PDF) 78 Page - Microchip Technology |
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DSPIC30F2012AT30E/P Scheda tecnica(HTML) 78 Page - Microchip Technology |
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78 / 205 page ![]() dsPIC30F2011/2012/3012/3013 DS70139E-page 76 © 2006 Microchip Technology Inc. FIGURE 10-1: 32-BIT TIMER2/3 BLOCK DIAGRAM TMR3 TMR2 T3IF Equal Comparator x 32 PR3 PR2 Reset LSB MSB Event Flag Note: Timer Configuration bit T32 (T2CON<3>) must be set to ‘1’ for a 32-bit timer/counter operation. All control bits are respective to the T2CON register. Data Bus<15:0> Read TMR2 Write TMR2 16 16 16 Q QD CK TGATE (T2CON<6>) (T2CON<6>) TGATE 0 1 TON TCKPS<1:0> 2 TCY 1 x 0 1 0 0 Gate T2CK Sync ADC Event Trigger Sync TMR3HLD Prescaler 1, 8, 64, 256 |
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