CS4341_05 datasheet(12/34 Pages) CIRRUS

Il numero della parte	CS4341

Spiegazioni elettronici	24-Bit, 96 kHz Stereo DAC with Volume Control

PDF	34 Pages

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Produttore elettronici	CIRRUS [Cirrus Logic]

Homepage	http://www.cirrus.com

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12 / 34 page

CS4341

DS298F5

SWITCHING CHARACTERISTICS - CONTROL PORT INTERFACE (I²C®)

Notes: 8. Data must be held for sufficient time to bridge the transition time, tfc, of SCL.

9. See “Rise Time for Control Port Clock” on page 21 for a recommended circuit to meet rise time

specification.

Parameter

Symbol

Min

Max

Unit

I²C Mode

SCL Clock Frequency

fscl

100

kHz

RST Rising Edge to Start

tirs

500

Bus Free Time Between Transmissions

tbuf

4.7

µs

Start Condition Hold Time (prior to first clock pulse)

thdst

4.0

µs

Clock Low time

tlow

4.7

µs

Clock High Time

thigh

4.0

µs

Setup Time for Repeated Start Condition

tsust

4.7

µs

SDA Hold Time from SCL Falling

(Note 8)

thdd

µs

SDA Setup time to SCL Rising

tsud

250

Rise Time of SCL

(Note 9)

trc

-25

Fall Time of SCL

tfc

-25

Rise Time SDA

trd

-1

µs

Fall Time of SDA

tfd

-300

Setup Time for Stop Condition

tsusp

4.7

µs

buf

hdst

low

t r

t f

hdd

t high

t sud

t sust

t susp

Stop

Start

Stop

Repeated

SDA

SCL

irs

RST

Figure 14. Control Port Timing - I²C Mode

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