Data Sheet

ADL8121

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

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Rev. A | 5 of 22

Figure 2. Pin Configuration

Table 6. Pin Function Descriptions

Pin No.

Mnemonic

Description

1

RBIAS

Bias Setting Resistor Between RBIAS and VDD to set quiescent drain current. See Figure 3 for the interface schematic.

2

RFIN

RF Input. The RFIN pin is dc-coupled and matched to 50 Ω. See Figure 4 for the interface schematic.

3, 4

GND

Ground. This pin must be connected to the RF and dc ground. See Figure 6 for the interface schematic.

5

RFOUT/VDD

RF Output/Drain Bias for the Amplifier. RFOUT/VDD is dc-coupled and matched to 50 Ω. See Figure 5 for the interface schematic.

6

NIC

Not Internally Connected. This pin is not connected internally.

EPAD

Exposed Pad. The exposed pad must be connected to the RF and dc ground.

INTERFACE SCHEMATICS

Figure 3. RBIAS Interface Schematic

Figure 4. RFIN Interface Schematic

Figure 5. RFOUT/VDD Interface Schematic

Figure 6. GND Interface Schematic