 |
Motore di ricerca datesheet componenti elettronici |
|
|
Motore di ricerca datesheet componenti elettronici |
|
CS42432-DMZ Scheda tecnica(PDF) 40 Page - Cirrus Logic |
|
|
|||||||||||||||||||||||||||||
CS42432-DMZ Scheda tecnica(HTML) 40 Page - Cirrus Logic |
|
|
40 / 59 page  40 DS673F1 CS42432 7.3 Power Control (Address 02h) 7.3.1 Power Down ADC Pairs (PDN_ADCX) Default = 0 0 - Disable 1 - Enable Function: When enabled, the respective ADC channel pair (ADC1 - AIN1/AIN2; and ADC2 - AIN3/AIN4) will remain in a reset state. 7.3.2 Power Down DAC Pairs (PDN_DACX) Default = 0 0 - Disable 1 - Enable Function: When enabled, the respective DAC channel pair (DAC1 - AOUT1/AOUT2; DAC2 - AOUT3/AOUT4; and DAC3 - AOUT5/AOUT6) will remain in a reset state. It is advised that any change of these bits be made while the DACs are muted or the power down bit (PDN) is enabled to eliminate the possibility of audible artifacts. 7.3.3 Power Down (PDN) Default = 0 0 - Disable 1 - Enable Function: The entire device will enter a low-power state when this function is enabled. The contents of the control registers are retained in this mode. 76 543 21 0 Reserved PDN_ADC2 PDN_ADC1 Reserved PDN_DAC3 PDN_DAC2 PDN_DAC1 PDN |
|
Link URL |
| Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | Collegamento alla scheda tecnica | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Italian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
