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AD9627PCB Scheda tecnica(PDF) 9 Page - Analog Devices |
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AD9627PCB Scheda tecnica(HTML) 9 Page - Analog Devices |
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9 / 40 page ![]() Preliminary Technical Data AD9627 Rev. PrA | Page 9 of 40 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 7. LFCSP Parallel CMOS Pin Configuration (Top View) 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 SDIO/DCS SENSE VREF SMI SDO/ OEB VIN+A VIN-A CML AVDD VIN-B VIN+B RBIAS AVDD SMI SCLK/ PDWN SMI SDFS AVDD D4B D5B D6B D7B D2A D1A D0A (LSB) NC NC DCOA DCOB D11B (MSB) D10B D9B D8B DRVDD SCLK/DFS Parallel CMOS Top View (not to scale) Table 8. Pin Function Descriptions (Parallel CMOS Mode) Pin No. Mnemonic Type Function 20, 64 DRGND Gnd Digital Output Ground 1, 21 DRVDD Supply Digital Output Driver Supply (1.8V to 3.3V) 24, 57 DVDD Supply Digital Power Supply (1.8V Nominal) 36, 45, 46 AVDD Supply Analog Power Supply (1.8V Nominal) 0 AGND Gnd Analog Ground (Pin 0 is the exposed thermal pad on the bottom of the package) 12, 13, 58, 59 NC Do Not Connect |
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