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PM5313 Scheda tecnica(PDF) 85 Page - PMC-Sierra, Inc |
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PM5313 Scheda tecnica(HTML) 85 Page - PMC-Sierra, Inc |
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85 / 646 page ![]() PRODUCTION PMC-Sierra, Inc. PM5313 SPECTRA-622 DATASHEET PMC-1981162 ISSUE 6 SONET/SDH PAYLOAD EXTRACTOR/ALIGNER FOR 622 MBIT/S PROPRIETARY AND CONFIDENTIAL 53 Pin Name Type Pin No. Function TOHCLK Tristate Output A25 The transmit overhead clock (TOHCLK) is used to clock in the transmit overhead (TOH). A smooth or gapped version of this clock may be selected. When selecting the smooth clock and clocking the section orderwire (E1), user channel (F1) or line order wire (E2), TOHCLK is a 64 kHz clock with nominal 50% duty cycle. When selecting to clock the line APS bytes (K1/K2), TOHCLK is a 128 kHz clock with nominal 50% duty cycle. When selecting the gapped clock and clocking the section orderwire (E1), user channel (F1) or line order wire (E2), TOHCLK is a 64 kHz clock generated by gapping a 72 kHz clock. When selecting to clock the line APS bytes (K1/K2), TOHCLK is a 128 kHz clock generated by gapping a 144 kHz clock. In all cases, TOH is sampled on the rising edge of TOHCLK. In gapped clock mode, a gap detector on TOHCLK is needed to identify the MSB on TOH. An edge detection on TFP may also be used. In smooth clock mode, TTOHFP may be used to identify the rising edge when the MSB should be present on TOH. The TTOC Overhead Control register contains the TOHSEL[1:0] register bits used to select the section orderwire, section user channel, line orderwire or line APS bytes. The same register also contains the TX_GAPSEL register bit used to select the smooth or gapped TOHCLK output clock and the TOH_TS register bit that can be used to tri-state the TOHCLK output. |
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