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AS7C3513C Scheda tecnica(PDF) 5 Page - Alliance Semiconductor Corporation |
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AS7C3513C Scheda tecnica(HTML) 5 Page - Alliance Semiconductor Corporation |
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5 / 9 page ![]() AS7C3513C 9/5/06, v 1.0 Alliance Memory P. 5 of 9 ® Write waveform 1 (WE controlled)10,11 Write cycle (over the operating range) 11 Parameter Symbol AS7C3513C-10 Unit Notes Min Max Write cycle time tWC 10 – ns Chip enable (CE) to write end tCW 7– ns Address setup to write end tAW 7– ns Address setup time tAS 0– ns Write pulse width tWP 7– ns Write recovery time tWR 0– ns Address hold from end of write tAH 0– ns Data valid to write end tDW 5– ns Data hold time tDH 0– ns 5 Write enable to output in high Z tWZ – 5 ns 4, 5 Output active from write end tOW 3 – ns 4, 5 Byte select low to end of write tBW 7– ns Address CE LB, UB WE DataIN DataOUT tWC tCW tBW tAW tAS tWP tDW tDH tOW tWZ tWR Data undefined high Z Data valid tAH |
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