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SI3233 Scheda tecnica(PDF) 91 Page - Silicon Laboratories

Il numero della parte SI3233
Spiegazioni elettronici  PROSLIC짰 PROGRAMMABLE CMOS SLIC WITH RINGING/BATTERY VOLTAGE GENERATION
PDF  100 Pages
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Produttore elettronici  SILABS [Silicon Laboratories]
Homepage  http://www.silabs.com
Logo SILABS - Silicon Laboratories

SI3233 Scheda tecnica(HTML) 91 Page - Silicon Laboratories

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Si3233
Preliminary Rev. 0.5
91
5. Pin Descriptions: Si3233
Pin #
Name
Description
35
CS
Chip Select.
Active low. When inactive, SCLK and SDI are ignored and SDO is high impedance. When
active, the serial port is operational.
36
INT
Interrupt.
Maskable interrupt output. Open drain output for wire-ORed operation.
37
PCLK
PCM Bus Clock.
Clock input.
38
TEST2
Test.
Enables test modes for Silicon Labs internal testing. This pin should always be tied to
ground for normal operation.
1NC
No Connect.
2
FSYNC
Frame Synch.
8 kHz frame synchronization signal for the PCM bus. May be short or long pulse format.
3
RESET
Reset.
Active low input. Hardware reset used to place all control registers in the default state.
4
SDCH
DC Monitor.
DC-DC converter monitor input used to detect overcurrent situations in the converter.
5
SDCL
DC Monitor.
DC-DC converter monitor input used to detect overcurrent situations in the converter.
6VDDA1
Analog Supply Voltage.
Analog power supply for internal analog circuitry.
7IREF
Current Reference.
Connects to an external resistor used to provide a high accuracy reference current.
27
28
29
30
31
34 33 32
1
2
3
4
5
6
7
8
9
10
11
12 13
26
25
14
35
36
37
38
15 16 17 18 19
24
23
22
21
20
NC
FSYNC
RESET
SDCH
SDCL
VDDA1
IREF
CAPP
QGND
CAPM
STIPDC
SRINGDC
IGMP
IRINGN
IRINGP
VDDA2
ITIPP
ITIPN
VDDD
GNDD
DCFF
DCDRV
SDITHRU
TEST1



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