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R2023K Scheda tecnica(PDF) 42 Page - RICOH electronics devices division |
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R2023K Scheda tecnica(HTML) 42 Page - RICOH electronics devices division |
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42 / 50 page ![]() R2023K/T 42 • 32-kHz CLOCK OUTPUT For the R2023K/T, 32.768-kHz clock pulses are output from the 32KOUT pin when either the CLEN1 bit in the Control Register 2 or the CLEN2 bit in the Control Register 1 is set to 0 when the CLKC pin is set to high. If the condition is not satisfied, the output is set to low. CLEN1 (D3 at Address Fh) CLEN2 (D4 at Address Eh) CLKC pin input 32KOUT PIN (CMOS push-pull output) 1 1 * * * 0 “L” 0(Default) * 1 * 0(Default) 1 Clock pulses The 32KOUT pin output is synchronized with the CLEN1 and CLEN2 bit and CLKC pin settings as illustrated in the timing chart below. 32KOUT PIN Max.62.0 µs CLKC pin or CLEN1 or CLEN2 bit setting |
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