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LTM4702 Scheda tecnica(PDF) 8 Page - Analog Devices |
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LTM4702 Scheda tecnica(HTML) 8 Page - Analog Devices |
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8 / 38 page ![]() Data Sheet LTM4640 analog.com Rev. 0 8 of 38 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS Figure 3. Pinout Configuration Pin Descriptions Table 4. Pin Descriptions BGA PACKAGE 49-PIN (6.25mm × 6.25mm × 5.07mm) TJMAX = 125°C, θJCtop = 10.1°C/W, θJCbottom = 3.9°C/W, θJA = 16°C/W TOP VIEW 5 1 2 3 4 7 6 A B C D E F G θ VALUES ARE DETERMINED BY SIMULATION PER JESD51 CONDITIONS, WEIGHT 660mg. θJA VALUE IS OBTAINED WITH DEMO BOARD. SEE THE APPLICATIONS INFORMATION SECTION FOR LAB MEASUREMENT AND DERATING INFORMATION. VOUT VIN PHMODE GND TSENSE– TSENSE+ SW CLKOUT COMPb FREQ VOSNS – MODE/CLKIN TRACK/SS VOSNS+ INTVCC RUN PGOOD FB COMPa VOUT PIN NAME DESCRIPTION CFG 1 A1–A5, F3, G1–G3 VOUT Power Output Pins of the Switching Mode Regulator. Apply output load between these pins and GND. Recommend placing output decoupling capacitance directly between these pins and the GND. See the Applications Information section for paralleling outputs. A6 TSENSE+ Temperature Monitor Pin. An internal diode-connected NPN transistor is placed between TSENSE+ and TSENSE– pins. See the Applications Information section for details. A7 TSENSE– Low-Side of the Internal Temperature Monitor. B1 VOSNS+ Positive Input to the Differential Remote Sense Amplifier. Internally, this pin is connected to the FB pin with a 10kΩ ±0.5% precision resistor. See the Applications Information section for details. B2, B6, C3– C7, D5–D7, E5–E7, F5– F7, G6–G7 GND Power Ground Pins for Both Input and Output Returns. Use large PCB copper areas to connect the GND pins together. |
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