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CAT24WC03GLATE13 Scheda tecnica(PDF) 3 Page - Catalyst Semiconductor |
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CAT24WC03GLATE13 Scheda tecnica(HTML) 3 Page - Catalyst Semiconductor |
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3 / 14 page ![]() Discontinued Parts CAT24WC03/05 3 Doc. No. 1005, Rev. F © 2005 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice A.C. CHARACTERISTICS VCC = +1.8V to +5.5V, unless otherwise specified. Read & Write Cycle Limits Note: (1) This parameter is tested initially and after a design or process change that affects the parameter. (2) tPUR and tPUW are the delays required from the time VCC is stable until the specified operation can be initiated. The write cycle time is the time from a valid stop condition of a write sequence to the end of the internal program/erase cycle. During the write cycle, the bus interface circuits are disabled, SDA is allowed to remain high, and the device does not respond to its slave address. Write Cycle Limits Symbol Parameter MinTyp Max Un its tWR Write Cycle Time 10 ms Power-Up Timing(1)(2) Symbol Parameter Max Units tPUR Power-up to Read Operation 1 ms tPUW Power-up to Write Operation 1 ms l o b m y Sr e t e m a r a P 8 . 1 - X X C W 4 2 T A CX X C W 4 2 T A C s t i n U V 5 . 5 - V 8 . 1V 5 . 5 - V 5 . 2V 5 . 5 - V 5 . 4 . n i M. x a M. n i M. x a M. n i M. x a M F L C S y c n e u q e r F k c o l C0 0 10 0 10 0 4z H k TI ) 1 ( t a t n a t s n o C e m i T n o i s s e r p p u S e s i o N s t u p n I A D S , L C S 0 0 20 0 20 0 2s n t A A K C A d n a t u O a t a D A D S o t w o L L C S t u O 5 . 35 . 31 µs t F U B ) 1 ( e r o f e B e e r F e b t s u M s u B e h t e m i T t r a t S n a C n o i s s i m s n a r T w e N a 7 . 47 . 42 . 1 µs t A T S : D H e m i T d l o H n o i t i d n o C t r a t S4 4 6 . 0 µs t W O L d o i r e P w o L k c o l C7 . 47 . 42 . 1 µs t H G I H d o i r e P h g i H k c o l C4 4 6 . 0 µs t A T S : U S e m i T p u t e S n o i t i d n o C t r a t S ) n o i t i d n o C t r a t S d e t a e p e R a r o f ( 7 . 47 . 46 . 0 µs t T A D : D H e m i T d l o H n I a t a D0 0 0 s n t T A D : U S e m i T p u t e S n I a t a D0 50 50 5s n tR ) 1 ( e m i T e s i R L C S d n a A D S1 1 3 . 0 µs tF ) 1 ( e m i T ll a F L C S d n a A D S0 0 30 0 30 0 3s n t O T S : U S e m i T p u t e S n o i t i d n o C p o t S4 4 6 . 0 µs t H D e m i T d l o H t u O a t a D0 0 10 0 10 0 1s n |
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