PPC405GPR-3KB266Z datasheet(49/57 Pages) AMCC

Il numero della parte	PPC405GPR-3KB266Z

Spiegazioni elettronici	Power PC 405GPr Embedded Processor

PDF	57 Pages

Scroll/Zoom	100%

Produttore elettronici	AMCC [Applied Micro Circuits Corporation]

Homepage	http://www.amcc.com

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405GPr – Power PC 405GPr Embedded Processor

AMCC

Revision 2.04 – September 7, 2007

Data Sheet

Trace

[TS1E]

[TS2E]

[TS1O]

[TS2O]

[TS3]

[TS4]

[TS5]

[TS6]

PTC/2+0.7

PTC/2-0.5

10.3

7.1

TrcClk

10pF load

clk/data

I/O Specifications—Group 1 (Sheet 3 of 3)

Notes:

1. PCI timings are for operation up to 66.66MHz. PCI output hold time requirement is 1ns for 66.66MHz and 2ns for 33.33MHz.

In synchronous mode, timing is relative to SysClk. In asynchronous mode, timing is relative to PCIClk.

2. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard.

3. For PCI, I/O H is specified at 0.9OVDD and I/O L is specified at 0.1OVDD. For all other interfaces, I/O H is specified at 2.4 V

and I/O L is specified at 0.4 V.

Signal

Input (ns)

Output (ns)

Output Current (mA)

Clock

Notes

Setup Time

(TIS min)

Hold Time

(TIH min)

Valid Delay

(TOV max)

Hold Time

(TOH min)

I/O H

(min)

I/O L

(min)

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