MPC8280 datasheet(1284/1386 Pages) FREESCALE

1284 / 1386 page

FCC Transparent Controller

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

38-4

Freescale Semiconductor

38.3.3

Transparent Synchronization Example

Figure 38-2 shows an example of synchronization using external signals.

Figure 38-2. Sending Transparent Frames between MPC8280s

MPC8280(A) and MPC8280(B) exchange transparent frames and synchronize each other using RTS and

CD. However, CTS is not required because transmission begins at any time. Thus, RTS is connected

directly to the other MPC8280’s CD. GFMR[SYNL] is not used and transmission and reception from each

MPC8280 are independent.

RXD

CLKx

TXD

RTS

RXD

BRGOx

RTS

TXD

CLKx

BRGOx

Last Bit of Frame Data

First Bit of Frame Data

(Output is CLKx Input)

TXD

(Output is RXD Input)

RTS

(Output is CD Input)

or CRC

TxBD[L] = 1 Causes Negation of RTS

CD Lost Condition Terminates Reception of Frame

MPC8280 (A)

MPC8280 (B)

Notes:

1 Each MPC8280 generates its own transmit clocks. If the transmit and receive clocks are the same, one can generate

transmit and receive clocks for the other MPC8280. For example, CLKx on MPC8280 (B) could be used to clock the

transmitter and receiver

2 CTS should be configured as always asserted in the parallel I/O port or connected to ground externally.

3 The required GSMR configurations are DIAG= 00, CTSS=1, CTSP is a don’t care, CDS=1, CDP=0, TTX=1, and

TRX=1. REVD and TCRC are application-dependent.

4 The transparent frame contains a CRC if TxBD[TC] is set.

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