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TYN1012RG Scheda tecnica(PDF) 4 Page - STMicroelectronics |
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TYN1012RG Scheda tecnica(HTML) 4 Page - STMicroelectronics |
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4 / 17 page ![]() Characteristics TN1215, TYN612, TYN812, TYN1012 4/17 DocID7475 Rev 11 Figure 1. Maximum average power dissipation versus average on-state current Figure 2. Average and DC on-state current versus case temperature Figure 3. Average and DC on-state current versus ambient temperature (DPAK, D2PAK) Figure 4. Relative variation of thermal impedance junction to case versus pulse duration 1E-3 1E-2 1E-1 1E+0 0.1 0.2 0.5 1.0 K=[Z /R th(j-c) th(j-c)] t (s) p Figure 5. Relative variation of thermal impedance junction to ambient versus pulse duration Figure 6. Relative variation of gate trigger, latching and holding current versus junction temperature 1E-2 1E-1 1E+0 1E+1 1E+2 5E+2 0.01 0.10 1.00 K=[Z /R th(j-a) th(j-a)] t (s) p DPAK TO-220AB / IPAK DPAK 2 Device mounted on FR4 with recommended pad layout |
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