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TLC6989 Scheda tecnica(PDF) 59 Page - Texas Instruments |
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TLC6989 Scheda tecnica(HTML) 59 Page - Texas Instruments |
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59 / 72 page ![]() www.ti.com EXAMPLE BOARD LAYOUT 10X (0.5) (1) (R0.05) TYP 0.07 MAX ALL AROUND 0.07 MIN ALL AROUND 12X (0.62) 12X (0.25) (2.78) (2.5) (1.3) ( 0.2) TYP VIA WSON - 0.8 mm max height DRR0012G PLASTIC SMALL OUTLINE - NO LEAD 4227052/A 08/2021 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. SYMM SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 20X SEE SOLDER MASK DETAIL 1 6 7 12 13 METAL EDGE SOLDER MASK OPENING EXPOSED METAL METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METAL NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED SOLDER MASK DETAILS www.ti.com TLC6989 SLVSHF5 – NOVEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 59 Product Folder Links: TLC6989 |
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