AL58263Q

Document number: DS46687 Rev. 2 - 2

21 of 26

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November 2024

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AL58263Q

Q

Functional Descriptions (continued)

Diagnosis and Protections (continued)

Pre-OTP Warning - Thermal Detection & Watchdog Result Read Out

The AL58263Q has pre-thermal warning threshold of +155°C (typical).

DCK

LAT

DI

PreOTP

Don’t

care

Don’t

care

DO

: Unknown Data

16

15

14

1

1

2

3

15

Don’t

care

8 pulses

14 pulses

DI=DO

Watchdog

Result

When the thermal detection instruction is executed, it is necessary to input eight DI pulses in the Error Detection Mode. AL58263Q will judge of

junction temperature by the instruction. If the junction temperature is over +155°C, it will lead to thermal error. The device will load the PreOTP and

watchdog result into the 16th and 1st image shift register and fill out the other image shift registers with bit code, 1. The error report will be shifted out

from the DO pin on the synchronization of the rising edge of DCK. And a retiming DO signal, which is similar to DI signal, appears when the LAT

signal stays in high level for cascading applications. When CMD[0] = 1 and GCK keeps low or high over 30ms, the watchdog result would be “0”,

otherwise it would be “1”.

LED Smart Detection

DCK

LAT

DI

Detection

time

IOUT15

Error Bit

IOUT14

Error Bit

IOUT12

Error Bit

IOUT0

Error Bit

DO

: Unknown Data

16

15

14

1

1

2

3

15

10 pulses

IOUT13

Error Bit

14 pulses

DI=DO

When the LED smart detection instruction is executed, it is necessary to input ten DI pulses in the Error Detection Mode. No matter what the image

latch data is, the output ports of the AL58263Q will turn on with 0.1mA for error detection. The detection time is defined from the falling edge of LAT

to the rising edge of following DCK. When the voltage of IOUT pins is below 0.3V for LED open detection or above the threshold voltage of LED

short detection determined by CMD[14:13], the error bit, zero, will be loaded into the corresponding image shift register. The error bit will be shifted

out from the DO pin on the synchronization of the rising edge of DCK. And a retiming DO signal, which is similar to DI signal, appears when the LAT

signal stays in high level for cascading applications.