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CD4049B Scheda tecnica(PDF) 2 Page - Silicon Supplies |
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CD4049B Scheda tecnica(HTML) 2 Page - Silicon Supplies |
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2 / 5 page ![]() Page 2 of 5 www.siliconsupplies.com CMOS High Voltage Logic – CD4049B Rev 1.0 21/11/17 COORDINATES (mm) PAD FUNCTION X Y 1 VDD 0.110 0.505 2 1Y 0.110 0.305 3 1A 0.110 0.110 4 2Y 0.542 0.110 5 2A 0.982 0.110 6 3Y 1.320 0.110 7 3A 1.320 0.280 8 VSS 1.320 0.700 9 4A 1.320 1.090 10 4Y 1.320 1.270 11 5A 0.942 1.270 12 5Y 0.542 1.270 13 6A 0.110 1.270 14 6Y 0.110 1.020 CONNECT CHIP BACK TO VDD OR FLOAT Pad Layout and Functions Logic Diagram Truth Table INPUTS A OUTPUT Y H L L H H = High level (steady state) L = Low level (steady state) 1550µm (61.02 mils) 0,0 12 13 11 10 9 8 4 3 2 1 DIE ID 7 6 5 14 PAD 1 = VDD PAD 8 = VSS |
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