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PCA9541BS/03 Scheda tecnica(PDF) 28 Page - NXP Semiconductors |
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PCA9541BS/03 Scheda tecnica(HTML) 28 Page - NXP Semiconductors |
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28 / 43 page ![]() PCA9541_5 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 05 — 1 October 2007 28 of 43 NXP Semiconductors PCA9541 2-to-1 I2C-bus master selector with interrupt logic and reset 10.5 Bus initialization/recovery to initialize slaves without hardware reset If the I2C-bus is hung, I2C-bus devices without a hardware reset pin (for example, Slave 1 and Slave 2 in Figure 22) can be isolated from the master by the PCA9541/03. The PCA9541/03 disconnects the bus when it is reset via the hardware reset line, restoring the master's control of the rest of the bus (for example, Slave 0). The bus master can then command the PCA9541/03 to send 9 clock pulses/STOP condition to reset the downstream I2C-bus devices before they are reconnected to the master or leave the downstream devices isolated. Fig 21. Gatekeeper multiplexer application 002aab615 Z A Z B Z C Z D Z E Z F Z G Z H Fig 22. Bus initialization/recovery application 002aab616 PCA9541/03 SLAVE 1 SDA SCL SLAVE 2 slave I2C-bus MASTER SLAVE 0 RESET SDA/SCL |
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