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74LVC1G19 Scheda tecnica(PDF) 3 Page - NXP Semiconductors |
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74LVC1G19 Scheda tecnica(HTML) 3 Page - NXP Semiconductors |
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3 / 15 page ![]() 74LVC1G19_4 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 04 — 27 August 2007 3 of 15 NXP Semiconductors 74LVC1G19 1-of-2 decoder/demultiplexer 6. Pinning information 6.1 Pinning 6.2 Pin description 7. Functional description [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care Fig 2. Pin configuration SOT363 and SOT457 Fig 3. Pin configuration SOT886 Fig 4. Pin configuration SOT891 74LVC1G19 A1Y GND E2Y 001aab986 1 2 3 6 VCC 5 4 74LVC1G19 GND 001aab985 A E VCC 1Y 2Y Transparent top view 2 3 1 5 4 6 74LVC1G19 GND 001aaf974 A E VCC 1Y 2Y Transparent top view 2 3 1 5 4 6 Table 3. Pin description Symbol Pin Description A 1 data input GND 2 ground (0 V) E 3 enable input (active LOW) 2Y 4 data output VCC 5 supply voltage 1Y 6 data output Table 4. Function table[1] Input Output E A 1Y 2Y LLLH L HHL HX HH |
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