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STCF03TBR Scheda tecnica(PDF) 17 Page - STMicroelectronics

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STCF03TBR Scheda tecnica(HTML) 17 Page - STMicroelectronics

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Introduction
STCF03
17/35
7.9
Interface protocol
The interface protocol is composed:
- A start condition (START)
- A Device address + R/W bit (read =1 / write =0)
- A Register address byte
- A sequence of data n* (1 byte + acknowledge)
- A stop condition (STOP)
The Register address byte determines the first register in which the read or write operation
takes place. When the read or write operation is finished, the register address is
automatically increased.
7.10
Writing to multiple registers with incremental addressing
It would be unpractical to send several times the device address and the address of the
register when writing to multiple registers. STCF03 supports writing to multiple registers with
incremental addressing. When the data is written to a register, the address register is
automatically increased, so the next data can be sent without sending the device address
and the register address again. See Figure 9 below.
Figure 8.
Writing to a single register
S
T
A
R
T
DEVICE
ADDRESS
7 bits
A
C
K
W
R
I
T
E
M
S
B
L
S
B
R
/
W
A
C
K
ADDRESS OF
REGISTER
DATA
A
C
K
A
C
K
S
T
O
P
M
S
B
M
S
B
L
S
B
L
S
B
SDA LINE
S
T
A
R
T
DEVICE
ADDRESS
7 bits
A
C
K
W
R
I
T
E
M
S
B
L
S
B
R
/
W
A
C
K
ADDRESS OF
REGISTER
DATA
A
C
K
A
C
K
S
T
O
P
M
S
B
M
S
B
L
S
B
L
S
B
S
T
A
R
T
DEVICE
ADDRESS
7 bits
A
C
K
W
R
I
T
E
M
S
B
L
S
B
R
/
W
A
C
K
ADDRESS OF
REGISTER
DATA
A
C
K
A
C
K
S
T
O
P
M
S
B
M
S
B
L
S
B
L
S
B
SDA LINE



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