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TMPR4938 Scheda tecnica(PDF) 90 Page - Toshiba Semiconductor |
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TMPR4938 Scheda tecnica(HTML) 90 Page - Toshiba Semiconductor |
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90 / 716 page ![]() Chapter 5 Configuration Registers 5-2 5.2 Registers Table 5.2.1 lists the configuration registers. Table 5.2.1 Configuration Register Mapping Offset Address Size in Bits Register Symbol Register Name 0xE000 64 CCFG Chip Configuration Register 0xE008 64 REVID Chip Revision ID Register 0xE010 64 PCFG Pin Configuration Register 0xE018 64 TOEA Timeout Error Access Address Register 0xE020 64 CLKCTR Clock Control Register 0xE030 64 GARBC G-Bus Arbiter Control Register 0xE048 64 RAMP Register Address Mapping Register 0xE058 64 JMPADR Jump Address Register Any address not defined in this table is reserved for future use. |
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