KB3440EMS datasheet(8/20 Pages) KINGBOR

8 / 20 page

The kB3440 provides high efficiency, low noise power

for applications such as portable instrumentation. The

Kingbor Technology allows input voltages above,

below or equal to the output voltage by properly phasing

the output switches. The error amp output voltage on the

VC pin determines the output duty cycle of the switches.

Since the VC pin is a filtered signal, it provides rejection of

frequencies from well below the switching frequency. The

low RDS(ON), low gate charge synchronous switches pro-

vide high frequency pulse width modulation control at

high efficiency. Schottky diodes across the synchronous

switch D and synchronous switch B are not required, but

provide a lower drop during the break-before-make time

(typically 15ns). The addition of the Schottky diodes will

improve peak efficiency by typically 1% to 2% at 600kHz.

High efficiency is achieved at light loads when Burst Mode

operation is entered and when the IC’s quiescent current

is a low 25

µA.

LOW NOISE FIXED FREQUENCY OPERATION

Oscillator

The frequency of operation is user programmable and is

set through a resistor from the RT pin to ground where:

610

An internally trimmed timing capacitor resides inside the

IC. The oscillator can be synchronized with an external

clock applied to the MODE/SYNC pin. A clock frequency of

twice the desired switching frequency and with a pulse

width between 100ns and 2

µs is applied. The oscillator RT

component value required is given by:

81010

•

where fSW = desired synchronized switching frequency.

For example to achieve a 1.2MHz synchronized switching

frequency the applied clock frequency to the MODE/SYNC

pin is set to 2.4MHz and the timing resistor, RT, is set to

66.5k (closest 1% value).

Error Amp

The error amplifier is a voltage mode amplifier. The loop

compensation components are configured around the

amplifier to provide loop compensation for the converter.

The SHDN/SS pin will clamp the error amp output, VC, to

provide a soft-start function.

Supply Current Limit

The current limit amplifier will shut PMOS switch A off

once the current exceeds 2.7A typical. The current ampli-

fier delay to output is typically 50ns.

Reverse Current Limit

The reverse current limit amplifier monitors the inductor

current from the output through switch D. Once a negative

inductor current exceeds – 400mA typical, the IC will shut

off switch D.

Output Switch Control

Figure 1 shows a simplified diagram of how the four

internal switches are connected to the inductor, VIN, VOUT

and GND. Figure 2 shows the regions of operation for the

kB3440 as a function of the internal control voltage, V CI.

The VCI voltage is a level shifted voltage from the output of

the error amp (VC pin) (see Figure 5). The output switches

are properly phased so the transfer between operation

modes is continuous, filtered and transparent to the user.

When VIN approaches VOUT the Buck/Boost region is

reached where the conduction time of the four switch

region is typically 150ns. Referring to Figures 1 and 2, the

various regions of operation will now be described.

Figure 1. Simplified Diagram of Output Switches

SW1

SW2

PMOS A

NMOS B

VIN

PMOS D

NMOS C

3440 F01

VOUT

kB3440

Kingbor Technology Co.,Ltd

TEL:(86)0755-26508846 FAX:(86)0755-26509052

OPERATION

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