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ST72682 Scheda tecnica(PDF) 30 Page - STMicroelectronics |
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ST72682 Scheda tecnica(HTML) 30 Page - STMicroelectronics |
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30 / 36 page ![]() Electrical characteristics ST72682 30/36 7.9 Other communication interface characteristics 7.9.1 MSCI parallel interface Figure 18. Timing diagrams for input mode (with max load on CTRL signal = 50 pf) 1. tDS is the setup time for data sampling. Figure 19. Timing diagrams for output mode (with max CTRL signal = 50 pf, DATA) 1. tDO is the data output time for data sampling. Table 23. MSCI parallel interface DC characteristics MSCI DC Electrical Characteristics Parameter Symbol Conditions Min. Typ(1) 1. Data based on design simulation and not tested in production. Max. Unit Data setup time tDS 11 ns Data output time tDO 6ns CTRL line capacitance Cctrl 50 pF Data line capacitance Cdata 50 pF DATA CTRL external ext device tDS (1) DATA(i) DATA(i+1) DATA CTRL external external tDO (1) DATA(i) DATA(i+1) |
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