Motore di ricerca datesheet componenti elettronici
  Italian  ▼
ALLDATASHEETIT.COM

X  

DP8051CPU Scheda tecnica(PDF) 4 Page - Digital Core Design

Il numero della parte DP8051CPU
Spiegazioni elettronici  Pipelined High Performance 8-bit Microcontroller
PDF  10 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Produttore elettronici  DCD [Digital Core Design]
Homepage  http://www.digitalcoredesign.com
Logo DCD - Digital Core Design

DP8051CPU Scheda tecnica(HTML) 4 Page - Digital Core Design

  DP8051CPU Datasheet HTML 1Page - Digital Core Design DP8051CPU Datasheet HTML 2Page - Digital Core Design DP8051CPU Datasheet HTML 3Page - Digital Core Design DP8051CPU Datasheet HTML 4Page - Digital Core Design DP8051CPU Datasheet HTML 5Page - Digital Core Design DP8051CPU Datasheet HTML 6Page - Digital Core Design DP8051CPU Datasheet HTML 7Page - Digital Core Design DP8051CPU Datasheet HTML 8Page - Digital Core Design DP8051CPU Datasheet HTML 9Page - Digital Core Design Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 10 page
background image
All trademarks mentioned in this document
are trademarks of their respective owners.
Copyright 1999-2007 DCD – Digital Core Design. All Rights Reserved.
http://www.DigitalCoreDesign.com
http://www.dcd.pl
SYMBOL
BLOCK DIAGRAM
PINS DESCRIPTI O N
PIN
TYPE
DESCRIPTION
clk
input
Global clock
reset
input
Global reset
port0i[7:0]
input
Port 0 input
port1i[7:0]
input
Port 1 input
port2i[7:0]
input
Port 2 input
port3i[7:0]
input
Port 3 input
iprgramsize[2:0]
input
Size of on-chip RAM CODE
iprgromsize[2:0]
input
Size of on-chip ROM CODE
prgramdata[7:0]
input
Data bus from int. RAM prog. memory
prgromdata[7:0]
input
Data bus from int. ROM prog. memory
sxdmdatai[7:0]
input
Data bus from sync external data
memory (SXDM)
xdatai[7:0]
input
Data bus from external memories
ready
input
External memory data ready
ramdatai[7:0]
input
Data bus from internal data memory
sfrdatai[7:0]
input
Data bus from user SFR’s
int0
input
External interrupt 0
int1
input
External interrupt 1
tdi
input
DoCD™ TAP data input
tck
input
DoCD™ TAP clock input
prgromdata(7:0)
prgramdata(7:0)
prgaddr(15:0)
prgdatao(7:0)
prgramwr
Program
memory
interface
Opcode
decoder
prgramdata(7:0)
prgromdata(7:0)
prgaddr(15:0)
prgdatao(7:0)
prgramwr
reset
clk
sfrdatai(7:0)
sfraddr(6:0)
sfrdatao(7:0)
sfroe
sfrwe
int0
int1
xaddr(23:0)
xdatao(7:0)
xdataz
xdatai(7:0)
ramaddr(7:0)
ramdatao(7:0)
ramwe
ramoe
ramdatai(7:0)
ready
xprgrd
xprgwr
xdatard
xdatawr
stop
pmm
iprgromsize(2:0)
iprgramsize(2:0)
tdi
tck
tms
tdo
rtck
coderun
debugacs
rsto
sxdmadd(15:0)
sxdmdatao(7:0)
sxdmwe
sxdmoe
sxdmxdatai(7:0)
sfraddr(6:0)
sfrdatao(7:0)
sfrdatao(7:0)
sfroe
sfrwe
xaddr(23:0)
xdatao(7:0)
xdatai(7:0)
xdataz
ready
xprgrd
xprgwr
xdatard
xdatawr
ramaddr(7:0)
ramdatao(7:0)
ramdatai(7:0)
ramwe
ramoe
Internal data
memory
interface
User SFR’s
interface
External
memory
interface
Control
Unit
clk
reset
SXDM
interface
sxdmaddr
sxdmdatao
sxdmdatai
sxdmoe
sxdmwe
Interrupt
controller
iprgromsize(2:0)
iprgramsize(2:0)
ALU
DoCD™
Debug Unit
Power
Manage-
ment Unit
int0
int1
tdi
tdo
pmm
stop
tck
tms
rtck
coderun
debugacs



Html Pages

1 2 3 4 5 6 7 8 9 10


Scheda tecnica Scarica

Go To PDF Page


Link URL



Lei ha avuto il aiuto da alldatasheet?  [ DONATE ] 

Di alldatasheet   |   Richest di pubblicita   |   contatti   |   Privacy Policy   |   Collegamento alla scheda tecnica    |   scambio Link   |   Ricerca produttore
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com