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TMP86CS64AFG Scheda tecnica(PDF) 167 Page - Toshiba Semiconductor |
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TMP86CS64AFG Scheda tecnica(HTML) 167 Page - Toshiba Semiconductor |
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167 / 202 page ![]() Page 157 TMP86CS64AFG 16. Synchronous Serial Interface (SIO2) The TMP86CS64AFG has a clocked-synchronous 8-bit serial interface. Serial interface has an 8-byte transmit and receive data buffer that can automatically and continuously transfer up to 64 bits of data. Serial interface is connected to outside peripherl devices via SO2, SI2, SCK2 port. 16.1 Configuration Figure 16-1 Serial Interface SIO control / status register Serial clock Shift clock Shift register 3 2 1 0 7 6 5 4 Transmit and receive data buffer (8 bytes in DBR) Control circuit CPU Serial data output Serial data input 8-bit transfer 4-bit transfer Serial clock I/O Buffer control circuit SO2 SI2 SCK2 SIO2CR2 SIO2CR1 SIO2SR INTSIO2 interrupt request |
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