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ATSHA204A Scheda tecnica(PDF) 36 Page - Microchip Technology |
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ATSHA204A Scheda tecnica(HTML) 36 Page - Microchip Technology |
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36 / 93 page ![]() Table 7-2. AC Parameters — All I/O Interfaces Parameter Symbol Direction Min Typ Max Unit Notes Wake Low Duration tWLO To Crypto Authentication 60 — μs SDA can be stable in either high or low levels during extended sleep intervals. Power-Up Delay tPU To Crypto Authentication 100(1) μs Minimum time between VCC > VCC min prior to measurement of tWLO. Wake High Delay to Data Comm. tWHI To Crypto Authentication 2.5 ms SDA should be stable high for this entire duration. High Side Glitch Filter at Active tHIGNORE_A To Crypto Authentication 45 ns Pulses shorter than this in width are ignored by the device, regardless of its state when active. Low Side Glitch Filter at Active tLIGNORE_A To Crypto Authentication 45 ns Pulses shorter than this in width are ignored by the device, regardless of its state when active. High Side Glitch Filter at Sleep tHIGNORE_S To Crypto Authentication 15 μs Pulses shorter than this in width are ignored by the device when in sleep mode. Low Side Glitch Filter at Sleep tLIGNORE_S To Crypto Authentication 15 μs Pulses shorter than this in width are ignored by the device when in sleep mode. Watchdog Reset tWATCHDOG To Crypto Authentication 0.7(1) 1.3 1.7 s Max. time from wake until device is forced into sleep mode (See Section Watchdog Failsafe). Note: 1. These parameters are guaranteed through characterization, but not tested. ATSHA204A Electrical Characteristics © 2018 Microchip Technology Inc. DS40002025A-page 36 |
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