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M48Z35AV Scheda tecnica(PDF) 9 Page - STMicroelectronics

Il numero della parte M48Z35AV
Spiegazioni elettronici  5.0V or 3.3V, 256Kbit (32Kbit x 8) ZEROPOWER® SRAM
PDF  24 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M48Z35AV Scheda tecnica(HTML) 9 Page - STMicroelectronics

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M48Z35AV
Operating modes
9/24
Figure 5.
Read mode AC waveforms
Note:
WRITE enable (W) = High.
Table 3.
Read mode AC characteristics
2.2
Write mode
The M48Z35AV is in the WRITE Mode whenever W and E are low. The start of a WRITE is
referenced from the latter occurring falling edge of W or E. A WRITE is terminated by the
earlier rising edge of W or E. The addresses must be held valid throughout the cycle. E or W
must return high for a minimum of tEHAX from Chip Enable or tWHAX from WRITE Enable
prior to the initiation of another READ or WRITE cycle. Data-in must be valid tDVWH prior to
the end of WRITE and remain valid for tWHDX afterward. G should be kept high during
Symbol
Parameter(1)
1.
Valid for ambient operating temperature: TA = 0 to 70°C; VCC = 3.0 to 3.6V (except where noted).
M48Z35AV
Unit
–100
Min
Max
tAVAV
READ cycle time
100
ns
tAVQV
Address valid to output valid
100
ns
tELQV
Chip enable low to output valid
100
ns
tGLQV
Output enable low to output valid
50
ns
tELQX
(2)
2.
CL = 5pF (see Figure 10 on page 15).
Chip enable low to output transition
10
ns
tGLQX
(2)
Output enable low to output transition
5
ns
tEHQZ
(2)
Chip enable high to output Hi-Z
50
ns
tGHQZ
(2)
Output enable high to output Hi-Z
40
ns
tAXQX
Address transition to output transition
10
ns
AI00925
tAVAV
tAVQV
tAXQX
tELQV
tELQX
tEHQZ
tGLQV
tGLQX
tGHQZ
VALID
A0-A14
E
G
DQ0-DQ7
VALID



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