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LP4056AB5F Scheda tecnica(PDF) 3 Page - Lowpower Semiconductor inc |
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LP4056AB5F Scheda tecnica(HTML) 3 Page - Lowpower Semiconductor inc |
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3 / 7 page ![]() LP4056-02 Aug.-2017 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 3 of 7 Preliminary Datasheet LP4056 Function Block Diagram 6 7 2 3 5 4 TA 125℃ TDIE CA MA VA C1 C2 C3 REF 1.22V STAT2 STAT1 SHDN TO BAT 2.9V VCC 3μA R3 1V R4 0.1V R5 ISET GND R2 R1 BAT VIN 5μA 1000X 1X + + + + + + - - - - - - Absolute Maximum Ratings Note1 Input to GND(VIN) ----------------------------------------------------------------------------------------------------- -0.3V to 8V Other Pin to GND ------------------------------------------------------------------------------------------------------ -0.3V to 6V BAT Short-circuit Duration ------------------------------------------------------------------------------------------- Continuous Maximum Junction Temperature ----------------------------------------------------------------------------------------- 125℃ Operating Ambient Temperature Range (TA) ---------------------------------------------------------------- -20℃ to 85℃ Storage Temperature---------------------------------------------------------------------------------------------- -45℃ to 165℃ Maximum Soldering Temperature (at leads, 10 sec) -------------------------------------------------------------- 260℃ Note1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Thermal Information Maximum Power Dissipation (ESOP8, PD, TA=25°C) ------------------------------------------------------------------ 2W Thermal Resistance (ESOP8, θJA) ------------------------------------------------------------------------------------- 50℃/W |
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