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STA538Q Scheda tecnica(PDF) 41 Page - STMicroelectronics |
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STA538Q Scheda tecnica(HTML) 41 Page - STMicroelectronics |
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41 / 59 page ![]() STA538 Registers 41/59 TTP0 Tri-state time-after-power-up register 0 Address: 0x07 Type: R/W Buffer: No Reset: 0x00 Description: TTP1 Tri-state time-after-power-up register 1 Address: 0x08 Type: R/W Buffer: No Reset: 0x02 Description: Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 TIM_TS_POWUP[15:8] 7:0 MSBs of TIM_TS_POWUP[15:8]: See register TTP1. Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 TIM_TS_POWUP[7:0] 7:0 LSBs of TIM_TS_POWUP[7:0]: time in which power is held in tri-state mode after a power- up signal: Time is TIM_TS_POWUP * 83.33 µs Default value corresponds to 166.66 µs tri-state time after power-up |
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