USB3290 datasheet(28/46 Pages) SMSC

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Small Footprint Hi-Speed USB 2.0 Device PHY with UTMI Interface

Datasheet

Revision 1.5 (11-02-07)

SMSC USB3290

DATASHEET

Chapter 8 Application Notes

The following sections consist of select functional explanations to aid in implementing the USB3290

into a system. For complete description and specifications consult the USB 2.0 Transceiver Macrocell

Interface Specification

and Universal Serial Bus Specification Revision 2.0.

8.1

Linestate

The voltage thresholds that the LINESTATE[1:0] signals use to reflect the state of DP and DM depend

on the state of XCVRSELECT. LINESTATE[1:0] uses HS thresholds when the HS transceiver is

enabled (XCVRSELECT = 0) and FS thresholds when the FS transceiver is enabled (XCVRSELECT

= 1). There is not a concept of variable single-ended thresholds in the USB 2.0 specification for HS

mode.

The HS receiver is used to detect Chirp J or K, where the output of the HS receiver is always qualified

with the Squelch signal. If squelched, the output of the HS receiver is ignored. In the USB3290, as

an alternative to using variable thresholds for the single-ended receivers, the following approach is

used.

In HS mode, 3ms of no USB activity (IDLE state) signals a reset. The SIE monitors LINESTATE[1:0]

for the IDLE state. To minimize transitions on LINESTATE[1:0] while in HS mode, the presence of

!Squelch is used to force LINESTATE[1:0] to a J state.

Table 8.1 Linestate States

STATE OF DP/DM LINES

LINESTATE[1:0]

FULL SPEED

XCVRSELECT =1

TERMSELECT=1

HIGH SPEED

XCVRSELECT =0

TERMSELECT=0

CHIRP MODE

XCVRSELECT =0

TERMSELECT=1

LS[1]

LS[0]

SE0

Squelch

!Squelch

!Squelch &

HS Differential Receiver

Output

Invalid

!Squelch &

!HS Differential Receiver

Output

SE1

Invalid

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