SC14441B52RLT datasheet(1/11 Pages) RENESAS

Il numero della parte	SC14441B52RLT

Spiegazioni elettronici	1.8 Single Chips for DECT with RFPA and QSPI

PDF	11 Pages

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Produttore elettronici	RENESAS [Renesas Technology Corp]

Homepage	http://www.renesas.com

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Short Datasheet

SC14441A/B/C, SC14442A

1.8 Single Chips for DECT with RFPA and QSPI

R32DO0002EE0100 Rev.01.00

June 26, 2024

CFR0011-120-00

Page 1

This short datasheet is an addendum to the

SC14441A/B/C, SC14442A datasheet.

The SC14441A/B/C, SC14442A are a family of

digital CMOS ICs with fully integrated radio

transceivers including RF Power Amplifier and

baseband processors for DECT and DECT 6.0

CAT-iQ handsets and base stations. The program

memory and data storage resided in a low cost, low

pin count Quad SPI (QSPI) Serial Flash. The dual

row LGA approach provides a backward compatible

pinning to the SC14481 devices.

Key Features

▪ Complies with DECT ETS 300 175-2,3 & 8 and

DECT 6.0

▪ 10.368/20.736 MHz XTAL digital controlled

oscillator

▪ Processing power

• 82.944 MHz 16 bit CompactRISCTM

CR16Cplus with 16 kB instruction and data

cache

• Four channel DMA controller with

(non-)blocking mode

• 82.944 MHz programmable Gen2DSP with

MicroCode ROM and 2 kB MicroCode RAM

• Dedicated Instruction Processor (DIP)

supporting CAT-iQ slot formats (1.25 kB DIP

RAM)

▪ Development/Debug support

• Serial Debug interface, Nexus Class-1

compliant

• Performance Timer for Gen2DSP and CR16C

• Instruction/Data/Event Trace unit

• Gen2DSP debugger with 2 ch. MCROM

patching

▪ Memories

• 16 kB + 4 kB non-shared/cache RAM

• 32 kB shared RAM (0/1 wait cycles)

• 48/2 kB Gen2DSP ROM/RAM

▪ Power management

• 1.9 V to 3.45 V operating range

• 1.8 V operating voltage with 1.8 V to 3.45 V I/O

• Charge control for 2x NiMH batteries and Li-Ion

• Dual output Voltage tripler

• DC-DC converter with boost, buck, boost-buck

operation

• Three matched current sources for white LEDs

• Ultra-low power mode (ULP) 32 kHz time base

and low power CR16 Mode in off mode

• Enhanced new battery detection

• Battery voltage comparator with interrupt

▪ Analog and Audio Interfaces

• Dual 8, 16, 32 kHz 16-bit linear audio CODEC

• Analog Front End to differential and single

ended microphones and 28

Ω loudspeaker

• CLASS-D amplifier 0.5 W 2.5 V (4 Ω)

• 10 bit ADC for line interface, Battery voltage,

temperature sensor, headset detection

• Opamps for caller-id, ringing, parallel set

detection

▪ Digital interfaces

• 82.944 MHz,1.8 V to 3.3 V Quad SPI interface

for serial FLASH with erase suspend/resume

support for EEPROM function and CAT-iQ

SUOTA

• 4+2 general purpose I/O 8 bit ports

• Keyboard interface with debounce counter

• Dual UART Full duplex 9600 Bd to 230.4 kBd

• Dual SPI+™ interface 20.736 MHz

(Master/Slave)

• Dual ACCESS bus 100 kHz, 400 kHz,

1.152 MHz

• 6 channel PCM+ Interface M/S (I2S

compatible)

▪ Three general purpose timers and watch dog

timer

▪ Radio transceiver

• Integrated 1.9 GHz/1.7 GHz CMOS transceiver

<70

µs RF PLL lock time

• Four digital output ports (including two for fast

antenna diversity switching)

• -96 dBm receiver sensitivity

▪ Integrated 1.9 GHz PA for DECT

• High Power Mode EU (HPM): 25.5 dBm

• High Power Mode USA (HPM): 23.5 dBm

• Low Power Mode (LPM): 12 dBm

• "Green" Mode (GPM): 4 dBm

• Low Radiation Mode (LRM): -35 dBm

• Output power ramp and flatness control

▪ LGA96, LGA132 and QFN88 packages

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