ACT88320 datasheet(21/57 Pages) QORVO

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Data Sheet Rev. E, November 2019 | Subject to change without notice

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ACT88320

Advanced PMU with Inrush Control and Bypass Switch

Table 2. DPSLP Mode with Truth Table

THERMAL State

In the THERMAL state the chip has exceeded the

thermal shutdown temperature. To protect the device,

all the regulators are shut down and the reset pins are

asserted low. This state can be disabled by setting

interrupt from going active, but does not prevent the IC

from entering the THERMAL State.

OVUV FAULT State

In the OVUV FAULT state one of the regulators has

exceed an OV level at any time or UV level after the soft

start ramp has completed. All regulators shutdown and

all three reset outputs are asserted low when the IC

enters OVUVFLT state. The OVUVFLT state is timed to

retry after 100ms and enter the ACTIVE state. If the OV

or UV condition still exists in the ACTIVE state the IC

returns back to the OVUVFLT state. The cycle

continues until the OV or UV fault is removed or the

input power is removed. This state can be disabled by

setting the DIS_OVUV_SHUTDOWN bit high. The IC

does not directly enter OVUVFLT in an overcurrent

condition, but does enter this state due to the resulting

UV condition.

Each regulator has an undervoltage fault mask and an

overvoltage fault mask. If the UV or OV fault mask is

active, nIRQ is not asserted in the fault condition. Even

though the fault is masked, the system can still read

each regulators UV and OV. Even though the fault is

masked, the IC still enters the OVUV Fault state.

Startup/Shutdown

The IC automatically transitions from the RESET state

to the POWER SEQUENCE START state when input

power is applied. The IC then transitions to either the

POWER ON, SLEEP, or DPSLP state depending on the

status of the inputs in Tables 1 and 2. A typical startup

profile is for the system to automatically transition from

RESET to POWER ON when input power is applied.

The typical shutdown sequence is for the system to pull

PWREN low to enter DPSLP.

Sequencing

The ACT88320 provides the end user with extremely

versatile sequencing capability that can be optimized for

many different applications. Each of the five outputs has

four basic sequencing parameters: input trigger, turn-on

delay, turn-off delay, and output voltage. The buck

converters also have softstart time control. Each of

these parameters is controlled via the ICs internal

registers. As an example, the ACT88320QI101-T

sequencing and output voltages are optimized for the

Silicon Motion SM2258 and SM2259 processors. The

specifics for this IC as well as others are detailed at the

end of the datasheet. Contact sales@active-semi.com

for custom sequencing configurations. Refer to the

Active-Semi Application Note AN-109, ACT88320Q101

map functionality and programming ranges.

Input trigger. The input trigger for a regulator is the

event that turns that regulator on. Each output can have

a separate input trigger. The input trigger can be the

internal power ok (POK) signal from one of the other

regulators, the internal VIN POK signal, or an external

signal applied to an input pin such as EXT_PG or GPIO.

This flexibility allows a wide range of sequencing

possibilities, including having some of the outputs be

sequenced with an external power supply or a control

signal from the host. As an example, if the LDO1 input

trigger is Buck1, LDO1 will not turn on until Buck1 is in

regulation. Input triggers are defined at the factory and

can only be changed with a custom CMI configuration.

The GPIOx outputs can be connected to an internal

power supply’s POK signal and used to trigger external

supplies in the overall sequencing scheme. The GPIOx

inputs can also be connected to an external power

supply’s power good output and used as an input trigger

for an ACT88320 supply.

Turn-on Delay. The turn-on delay is the time between

an input trigger going active and the output starting to

turn on. Each output’s turn-on delay is configured via its

I2C bit ON DELAY. Turn-on delays can be changed after

the IC is powered on, but they are volatile and reset to

the factory defaults when power is recycled.

Turn-off Delay. The turn-off delay is the time between

an input trigger going inactive and the output starting to

turn off. Each output’s turn-off delay is configured via its

I2C bit OFF DELAY. Turn-off delays can be changed

after the IC is powered on, but they are volatile and reset

to the factory defaults when power is recycled.

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