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ADPL42005ARDZ-5.0-R7 Scheda tecnica(PDF) 23 Page - Analog Devices |
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ADPL42005ARDZ-5.0-R7 Scheda tecnica(HTML) 23 Page - Analog Devices |
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23 / 26 page ![]() Data Sheet ADPL42005 analog.com Rev. 0 23 of 26 OUTLINE DIMENSIONS Figure 51. 8-Lead Lead Frame Chip Scale Package [LFCSP] 3 mm × 3 mm Body and 0.75 mm Package Height (CP-8-11) Dimensions shown in millimeters Figure 52. 8-Lead Standard Small Outline Package, with Exposed Pad [SOIC_N_EP] Narrow Body (RD-8-1). Dimensions shown in millimeters 2.44 2.34 2.24 0.30 0.25 0.20 0.80 0.75 0.70 1.70 1.60 1.50 0.203 REF 0.05 MAX 0.02 NOM 0.50 BSC 3.10 3.00 SQ 2.90 COPLANARITY 0.08 0.50 0.40 0.30 COMPLIANT JEDEC STANDARDS MO-229-W3030D-4 0.20 MIN 8 1 5 4 TOP VIEW SIDE VIEW EXPOSED PAD BOTTOM VIEW P IN 1 IN DI CAT O R AR E A OP T IO NS (SEE DETAI L A) 1 DETAIL A (JEDEC 95) PIN 1 INDEX AREA SEATING PLANE TOP VIEW SIDE VIEW COMPLIANT TO JEDEC STANDARDS MS-012-AA 0.356 0.457 4.00 3.90 3.80 6.20 6.00 5.80 5.00 4.90 4.80 0.10 MAX 0.05 NOM 3.81 REF 8° 0° 45° 1.04 REF 8 1 4 5 1.75 1.35 1.65 1.25 2.39 2.29 SQ 2.19 0.51 0.31 0.50 0.25 1.27 0.40 0.25 0.17 COPLANARITY 0.10 1.27 BSC BOTTOM VIEW END VIEW SEATING PLANE EXPOSED PAD |
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