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DAC7741YC/2K Scheda tecnica(PDF) 14 Page - Texas Instruments

Il numero della parte DAC7741YC/2K
Spiegazioni elettronici  16-Bit, Single Channel DIGITAL-TO-ANALOG CONVERTER With Internal Reference and Parallel Interface
PDF  23 Pages
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Produttore elettronici  TI2 [Texas Instruments]
Homepage  https://www.ti.com
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DAC7741YC/2K Scheda tecnica(HTML) 14 Page - Texas Instruments

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DAC7741
14
SBAS248B
www.ti.com
ANALOG OUTPUTS
The output amplifier can swing to within 1.4V of the supply
rails, specified over the –40
°C to +85°C temperature range.
This allows for a
±10V DAC voltage output operation from
±12V supplies with a typical 5% tolerance.
When the DAC7741 is configured for a unipolar, 0V to 10V
output, a negative voltage supply is required. This is due to
internal biasing of the output stage. Please refer to the
“Electrical Characteristics” table for more information.
The minimum and maximum voltage output values are de-
pendent upon the output configuration implemented and
reference voltage applied to the DAC7741. Please note that
VSS (the negative power supply) must be in the range of
–4.75V to –15.75V for unipolar operation. The voltage on VSS
sets several bias points within the converter and is required
in all modes of operation. If VSS is not in one of these two
configurations, the bias values may be in error and proper
operation of the device is not ensured.
Supply sequence is important in establishing the correct
startup of the DAC. The digital supply (VDD) needs to estab-
lish correct bias conditions before the analog supplies (VCC,
VSS) are brought up. If the digital supply cannot be brought
up first, it must come up before either analog supply (VCC or
VSS), with the preferred sequence of: VSS (device substrate),
VDD then VCC.
REFERENCE INPUTS
The DAC7741 provides a built-in +10V voltage reference and
on-chip buffer to allow external component reference drive. To
use the internal reference, REFEN must be LOW, enabling the
reference circuitry of the DAC7741 (see Table I) and the
REFOUT pin must be connected to REFIN. This is the input to
the on-chip reference buffer. The buffers output is provided at
REFEN
ACTION
1
Internal Reference disabled;
REFOUT = HIGH Impedance
0
Internal Reference enabled;
REFOUT = +10V
TABLE I. REFEN Action.
TABLE II. DAC7741 Logic Truth Table.
the VREF pin. In this configuration, VREF is used to setup the
DAC7741 output amplifier into one of three voltage output
modes as discussed earlier. VREF can also be used to drive
other system components requiring an external reference.
The internal reference of the DAC7741 can be disabled when
use of an external reference is desired. When using an
external reference, the reference input, REFIN , can be any
voltage between 4.75V (or VSS + 14V, whichever is greater)
and VCC – 1.4V.
DIGITAL INTERFACE
Table III shows the data format for the DAC7741 and
Table II illustrates the basic control logic of the device. The
interface consists of a chip select input (CS), read/write
control input (R/W), data inputs (DB0-DB15) and a load DAC
input (LDAC). An asynchronous reset input (RST) which is
active low, is provided to simplify start-up conditions, periodic
resets, or emergency resets to a known state, depending on
the status of the reset select (RSTSEL) signal. The DAC
code is provided via a 16-bit parallel interface, as shown in
Table II. The input word makes up the DAC code to be
loaded into the data input register of the device. The data is
latched into the input register on rising CS and is loaded into
the DAC register upon reception of a rising edge on the
LDAC input. This action updates the analog output, VOUT, to
the desired value. LDAC inputs of multiple DAC7741 devices
can be connected when a synchronized update of numerous
DAC outputs is desired. Please refer to the timing section for
more detailed data I/O information.
CONTROL STATUS
COMMAND
R/W
CS
RST
RSTSEL
LDAC
Input Register
DAC Register
Mode
L
L
H
X
H, L,
↓
Write
Hold
Write Data to Input Register
XH
H
X
↑
Hold
Write
Update DAC register with data from input
register.
LL
H
X
↑
Transparent
Write
Write DAC register directly from data bus
H
L
H
X
H, L,
↓
Read
Hold
Read data in input register.
X
H
H
X
H, L,
↓
Hold
Hold
No Change
XX
L
L
X
Reset to Min-Scale Reset to Min-Scale Reset to Input and DAC Register (0000
H)
Min-Scale
XX
L
H
X
Reset to Mid-Scale Reset to Mid-Scale Reset to Input and DAC Register (8000
H)
Mid-Scale
ANALOG OUTPUT
TABLE III. DAC7741 Data Format.
DIGITAL INPUT
Unipolar Configuration
Bipolar Configuration
Unipolar Straight Binary
Bipolar Offset Binary
0x0000
Zero (0V)
–Full-Scale (–VREF or –VREF/2)
0x0001
Zero + 1LSB
–Full-Scale + 1LSB
::
:
0x8000
1/2 Full-Scale
Bipolar Zero
0x8001
1/2 Full-Scale + 1LSB
Bipolar Zero + 1LSB
::
:
0xFFFF
Full-Scale (VREF – 1LSB)
+Full-Scale (+VREF – 1LSB
or +VREF/2 – 1LSB)



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