LP3944

www.ti.com

SNVS264A – MAY 2004 – REVISED APRIL 2013

APPLICATION INFORMATION

Theory of Operation

The LP3944 takes incoming data and feed them into several registers that control the frequency and the duty

cycle of the LEDs. Two prescaler registers and two PWM registers provide two individual rates to dim or blink the

LEDs (for more information on these registers, refer to Table 1). The baseband controller/microprocessor can

program each LED to be in one of four states—on, off, DIM0 rate or DIM1 rate. One read-only registers provide

status on all 8 LEDs. The LP3944 can be used to drive RGB LEDs and/or single-color LEDs to create a colorful,

entertaining, and informative setting. This is particularly suitable for accessory functions in cellular phones and

toys. Any LED pins not used to drive LED can be used for General Purpose Parallel Input/Output (GPIO)

expansion.

The LP3944 is equipped with Power-On Reset that holds the chip in a reset state until VDD reaches VPOR during

power up. Once VPOR is achieved, the LP3944 comes out of reset and initializes itself to the default state.

To bring the LP3944 into reset, hold the RST pin LOW for a period of TW. This will put the chip to its default

state. The LP3944 can only be programmed after RST signal is HIGH again.

I

2C Data Validity

The data on SDA line must be stable during the HIGH period of the clock signal (SCL). In other words, state of

the data line can only be changed when CLK is LOW.

Figure 4. I2C Data Validity

I

2C Start and Stop Conditions

START and STOP bits classify the beginning and the end of the I2C session. START condition is defined as SDA

signal transitioning from HIGH to LOW while SCL line is HIGH. STOP condition is defined as the SDA

transitioning from LOW to HIGH while SCL is HIGH. The I2C master always generates START and STOP bits.

The I2C bus is considered to be busy after START condition and free after STOP condition. During data

transmission, I2C master can generate repeated START conditions. First START and repeated START

conditions are equivalent, function-wise.

Figure 5. I2C START and STOP Conditions

Transferring Data

Every byte put on the SDA line must be eight bits long with the most significant bit (MSB) being transferred first.

The number of bytes that can be transmitted per transfer is unrestricted. Each byte of data has to be followed by

an acknowledge bit. The acknowledge related clock pulse is generated by the master. The transmitter releases

the SDA line (HIGH) during the acknowledge clock pulse. The receiver must pull down the SDA line during the

9th clock pulse, signifying an acknowledge. A receiver which has been addressed must generate an

acknowledge after each byte has been received.

Copyright © 2004–2013, Texas Instruments Incorporated

Submit Documentation Feedback

7

Product Folder Links: LP3944