MIC5166 datasheet(15/36 Pages) MICROCHIP

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DS20006085B-page 15

MIC5166

4.0

FUNCTIONAL DIAGRAM

DDR memory requires two power supplies: one for the

memory chip, referred to as VDDQ, and the other for a

termination supply, VTT, which is one-half VDDQ. With

memory speeds in excess of 300 MHz, the memory

system bus must be treated as a transmission line. To

maintain good signal integrity the memory bus must be

terminated to minimize signal reflections. Figure 4-1

shows the simplified termination circuit. Each control,

address and data lines have these termination resistors

RS and RT connected to them.

FIGURE 4-1:

DDR Memory Termination

Circuit.

Bus termination provides a means to increase signaling

speed while maintaining good signal integrity. The

termination network consists of a series resistor (RS)

and a terminating resistor (RT). Values of RS range

between 10Ω to 30Ω with a typical of 22Ω, while RT

ranges from 22Ω to 28Ω with a typical value of 25Ω.

VREF must maintain half VDDQ with a ±1% tolerance,

while VTT will dynamically sink and source current to

maintain a termination voltage of ±40 mV from the

VREF line under all conditions. This method of bus

termination reduces common-mode noise, settling

time, voltage swings, EMI/RFI, and improves slew

rates.

VDDQ powers all the memory ICs, memory drivers and

receivers for all the memory bits in the DDR memory

system. The MIC5166 regulates VTT to VDDQ/2 during

sourcing or sinking current.

The memory bits are not usually all at a logic high or

logic low at the same time, so the VTT supply is usually

not sinking or sourcing –3A or +3A current

continuously.

4.1

VTT

VTT is regulated to VREF. Due to high-speed signaling,

the load current seen by VTT is constantly changing. To

maintain adequate transient response, two 10 µF

ceramic capacitors are required. The proper placement

of ceramic capacitors is important to reduce both ESR

and ESL such that high-current and high-speed

transients do not exceed the dynamic voltage tolerance

requirement of VTT. The ceramic capacitors provide

current during the fast edges of the bus transition.

Using several smaller ceramic capacitors distributed

near the termination resistors is important to reduce the

effects of PCB trace inductance.

4.2

VDDQ

The VDDQ input on the MIC5166 is used to create the

internal reference voltage for VTT. The reference

voltage is generated from an internal resistor divider

network of two 500 kΩ resistors, generating a

reference voltage VREF that is VDDQ/2. The VDDQ input

should be Kelvin connected as close as possible to the

memory supply voltage.

Because the reference is simply VDDQ/2, any

perturbations on VDDQ will also appear at half the

amplitude on the reference. For this reason, a 4.7 µF

ceramic capacitor is required on the VDDQ supply. This

will aid performance by improving the source

impedance over a wide frequency range.

4.3

Sense

The sense (SNS) pin provides the path for the error

amplifier to regulate VTT. The SNS input must also be

Kelvin connected to the VTT bypass capacitors. If the

SNS input is connected too close to the MIC5166, the

IR drop of the PCB trace can cause the VTT voltage at

the memory chip to be too low. Placing the MIC5166 as

close as possible to the DDR memory will improve the

load regulation performance.

4.4

Enable

The MIC5166 features an active-high enable input (EN)

that allows on-off control of the regulator. The current

through the device reduces to near “zero” when the

device is shutdown, with only <0.2 µA of leakage

current. The EN input may be directly tied to VBIAS. The

active-high enable pin uses CMOS technology and the

enable pin cannot be left floating. A floating enable pin

may cause an indeterminate state on the output.

4.5

Power Good (PG)

The power good (PG) output provides an undervoltage

and overvoltage fault flag for the VTT output. The PG

output remains high as long as VTT is within ±10%

range of VREF and goes low if the output moves beyond

this range.

DDR

MEMORY

VTT

VDDQ

1.0μF

PGND

22μF

AGND

VREF

1.0μF

VDDQ

1.8V

MIC5166

CHIP SET

VDDQ

VREF

BIAS

VBIAS

SNS

10μF

VIN

4.7μF

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