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PCM1742E/2K Scheda tecnica(PDF) 14 Page - Texas Instruments |
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PCM1742E/2K Scheda tecnica(HTML) 14 Page - Texas Instruments |
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14 / 40 page ![]() www.ti.com LRCK BCK DATA 50% of V DD 50% of V DD 50% of V DD t BCH t BCL t LB t BL t DS t DH t BCY PCM1742 SBAS176A – DECEMBER 2000 – REVISED APRIL 2005 SYMBOL DESCRIPTION MIN MAX UNIT tBCY BCK pulse cycle time 1/(64 fS)(1) tBCH BCK high-level time 35 ns tBCL BCK low-level time 35 ns tBL BCK rising edge to LRCK edge 10 ns tLB LRCK falling edge to BCK rising edge 10 ns tDS DATA setup time 10 ns tDH DATA hold time 10 ns (1) fS is the sampling frequency (e.g., 44.1 kHz, 48 kHz, 96 kHz, etc.). Figure 22. Audio Interface Timing 14 |
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