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PCM1796DB Scheda tecnica(PDF) 20 Page - Texas Instruments |
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PCM1796DB Scheda tecnica(HTML) 20 Page - Texas Instruments |
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20 / 63 page ![]() PCM1796 SLES100A − DECEMBER 2003 − REVISED NOVEMBER 2006 www.ti.com 20 t(MCH) 1.4 V MS t(MSS) LSB 1.4 V 1.4 V t(MCL) t(MHH) t(MSH) t(MCY) t(MDH) t(MDS) MC MDI t(MOS) 50% of VDD MDO PARAMETER MIN MAX UNITS t(MCY) MC pulse cycle time 100 ns t(MCL) MC low-level time 40 ns t(MCH) MC high-level time 40 ns t(MHH) MS high-level time 80 ns t(MSS) MS falling edge to MC rising edge 15 ns t(MSH) MS hold time(1) 15 ns t(MDH) MDI hold time 15 ns t(MDS) MDI setup time 15 ns t(MOS) MC falling edge to MDO stable 30 ns (1) MC rising edge for LSB to MS rising edge Figure 30. Control Interface Timing |
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