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PCM1804DB Scheda tecnica(PDF) 26 Page - Texas Instruments |
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PCM1804DB Scheda tecnica(HTML) 26 Page - Texas Instruments |
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26 / 39 page ![]() www.ti.com OVERFLOW FLAG FOR PCM 1/fS 90/fS Converted Data(2) Zero Data Undefined Data Normal Data Synchronous Asynchronous Synchronous Resynchronization Synchronization Lost DATA(1) State of Synchronization T0020-06 PCM1804 SLES022C – DECEMBER 2001 – REVISED OCTOBER 2007 The PCM1804 has two overflow flag pins, OVFR (pin 20) and OVFL (pin 21). The pins go to high as soon as the analog input goes across the full-scale range. The high level is held for 1.016 s at maximum, and returns to low if the analog input does not go across the full-scale range for the period. (1) Applies only for slave mode; the loss of synchronization never occurs in master mode. (2) The HPF transient response appears initially. Figure 41. ADC Digital Output for Loss of Synchronization and Resynchronization 26 Submit Documentation Feedback Copyright © 2001–2007, Texas Instruments Incorporated Product Folder Link(s): PCM1804 |
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