Motore di ricerca datesheet componenti elettronici
  Italian  ▼
ALLDATASHEETIT.COM

X  

Preview PDF HTML

PCM3060 Scheda tecnica(PDF) 28 Page - Texas Instruments

Il numero della parte PCM3060
Spiegazioni elettronici  24-BIT, 96/192-kHz ASYNCHRONOUS STEREO AUDIO CODEC
PDF  48 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Produttore elettronici  TI2 [Texas Instruments]
Homepage  https://www.ti.com
Logo TI2 - Texas Instruments

PCM3060 Scheda tecnica(HTML) 28 Page - Texas Instruments

Back Button PCM3060 Datasheet HTML 24Page - Texas Instruments PCM3060 Datasheet HTML 25Page - Texas Instruments PCM3060 Datasheet HTML 26Page - Texas Instruments PCM3060 Datasheet HTML 27Page - Texas Instruments PCM3060 Datasheet HTML 28Page - Texas Instruments PCM3060 Datasheet HTML 29Page - Texas Instruments PCM3060 Datasheet HTML 30Page - Texas Instruments PCM3060 Datasheet HTML 31Page - Texas Instruments PCM3060 Datasheet HTML 32Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 28 / 48 page
background image
www.ti.com
Timing Diagram
SDA
SCL
t
(BUF)
t
(D-SU)
t
(D-HD)
Start
t
(LOW)
t
(S-HD)
t
(SCL-F)
t
(SCL-R)
t
(HI)
RepeatedStart
t
(S-SU)
t
(S-HD)
t
(SDA-F)
t
(SDA-R)
t
(P-SU)
Stop
t
(GW)
T0050-04
PCM3060
SLAS533B – MARCH 2007 – REVISED MARCH 2008
The detailed timing diagram for SCL and SDA is shown as follows.
Timing Characteristics
STANDARD MODE
FAST MODE
SYMBOL
PARAMETER
UNIT
MIN
MAX
MIN
MAX
f(SCL)
SCL clock frequency
100
400
kHz
t(BUF)
Bus free time between STOP and START conditions
4.7
1.3
µs
t(LOW)
Low period of the SCL clock
4.7
1.3
µs
t(HI)
High period of the SCL clock
4
0.6
µs
t(S-SU)
Setup time for START/repeated START condition
4.7
0.6
µs
t(S-HD)
Hold time for START/repeated START condition
4
0.6
µs
t(D-SU)
Data setup time
250
100
ns
t(D-HD)
Data hold time
0
3450
0
900
ns
t(SCL-R)
Rise time of SCL signal
1000
20 + 0.1 CB
300
ns
t(SCL-F)
Fall time of SCL signal
1000
20 + 0.1 CB
300
ns
t(SDA-R)
Rise time of SDA signal
1000
20 + 0.1 CB
300
ns
t(SDA-F)
Fall time of SDA signal
1000
20 + 0.1 CB
300
ns
t(P-SU)
Setup time for STOP condition
4
0.6
µs
t(GW)
Allowable glitch width
N/A
50
ns
CB
Capacitive load for SDA and SCL lines
400
100
pF
Noise margin at high level for each connected device (including hysteresis)
0.2 VDD
0.2 VDD
V
Noise margin at low level for each connected device (including hysteresis)
0.1 VDD
0.1 VDD
V
Hysteresis of Schmitt-trigger input
N/A
0.05 VDD
V
Figure 32. Control Interface Timing for I2C
28
Submit Documentation Feedback
Copyright © 2007–2008, Texas Instruments Incorporated
Product Folder Link(s): PCM3060



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48


Scheda tecnica Scarica

Go To PDF Page


Link URL



Lei ha avuto il aiuto da alldatasheet?  [ DONATE ] 

Di alldatasheet   |   Richest di pubblicita   |   contatti   |   Privacy Policy   |   Collegamento alla scheda tecnica    |   scambio Link   |   Ricerca produttore
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com