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STM32F207VCY6TR Scheda tecnica(PDF) 110 Page - STMicroelectronics |
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STM32F207VCY6TR Scheda tecnica(HTML) 110 Page - STMicroelectronics |
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110 / 184 page  Electrical characteristics STM32F20xxx 110/184 DocID15818 Rev 15 Figure 39. I/O AC characteristics definition 6.3.17 NRST pin characteristics The NRST pin input driver uses CMOS technology. It is connected to a permanent pull-up resistor, RPU (see Table 49). Unless otherwise specified, the parameters given in Table 49 are derived from tests performed under the ambient temperature and VDD supply voltage conditions summarized in Table 14. Figure 40. Recommended NRST pin protection 1. The reset network protects the device against parasitic resets. 2. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in Table 49. Otherwise the reset is not taken into account by the device. Table 49. NRST pin characteristics Symbol Parameter Conditions Min Typ Max Unit RPU Weak pull-up equivalent resistor(1) VIN = VSS 30 40 50 k Ω VF(NRST)(2) NRST Input filtered pulse - - - 100 ns VNF(NRST)(2) NRST Input not filtered pulse VDD > 2.7 V 300 - - ns TNRST_OUT Generated reset pulse duration Internal Reset source 20 - - µs 1. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution to the series resistance must be minimum (~10% order) . 2. Guaranteed by design, not tested in production. |
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