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TLC320AD50C/I Scheda tecnica(PDF) 25 Page - Texas Instruments

Il numero della parte TLC320AD50C/I
Spiegazioni elettronici   Sigma-Delta Analog Interface Circuits With Master-Slave Function
PDF  54 Pages
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Produttore elettronici  TI2 [Texas Instruments]
Homepage  https://www.ti.com
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TLC320AD50C/I Scheda tecnica(HTML) 25 Page - Texas Instruments

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2–10
Data values from 1 to 17 should not be used.
CLKOUT
DR
DX
MCLK
DOUT
DIN
FSD
CLKX
CLKR
SCLK
FSX
FSR
FS
SCLK
DOUT
FS
SCLK
DOUT
FS
DIN
MCLK
FSD
DIN
MCLK
FSD
Master
TMS320C5X
TMS320C2X
TMS320C54X
Slave 1
Slave 2
SCLK
DOUT
FS
DIN
MCLK
Slave 3
M/S
M/S
M/S
M/S
DVDD
Figure 2–12. Master With Slaves (To DSP Interface)
PP
P
P
S
128 SCLKs
S
Master FS
Master FSD
Slave 1 FS
S
Delay 1
Delay 2
Delay 3
Delay 4
Slave 1 FSD
Slave 2 FS
Slave 2 FSD
Slave 3 FS
Slave 3 FSD
(see Note A)
M
S1S2
S3M
S1
NOTE A: Slave 3 FSD cannot be used.
Figure 2–13. Master-Slave Frame-Sync Timing After A Delay Has Been Programmed Into The FSD
Register (D0–D5 of Control 3 Register)



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