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TPS2145IPWPR Scheda tecnica(PDF) 15 Page - Texas Instruments |
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TPS2145IPWPR Scheda tecnica(HTML) 15 Page - Texas Instruments |
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15 / 34 page ![]() TPS2145, TPS2147 TPS2155, TPS2157 SLVS333 − AUGUST 2001 15 www.ti.com TYPICAL CHARACTERISTICS 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 −40 −25 −10 5 20 35 50 65 UNDERVOLTAGE LOCKOUT vs JUNCTION TEMPERATURE TJ − Junction Temperature − °C Rising Falling 80 95 110 Figure 17 APPLICATION INFORMATION external capacitor requirements on power lines Ceramic bypass capacitors (0.01- µ to 0.1-µ) between VIN/SWIN1 and GND and SWIN2 and GND, close to the device, are recommended to improve load transient response and noise rejection. Bulk capacitors ( 4.7- µF) between VIN/SWIN1 and GND and between SWIN2 and GND are also recommended, especially if load transients in the hundreds of milliamps with fast rise times are anticipated. A 66- µF bulk capacitor is recommended from OUTx to ground, especially when the output load is heavy. This precaution helps reduce transients seen on the power rails. Additionally, bypassing the outputs with a 0.1- µF ceramic capacitor improves the immunity of the device to short-circuit transients. LDO output capacitor requirements Stabilizing the internal control loop requires an output capacitor connected between LDO_OUT and GND. The minimum recommended capacitance is a 4.7 µF with an ESR value between 200 mΩ and 10 Ω. Solid tantalum electrolytic, aluminum electrolytic and multilayer ceramic capacitors are all suitable, provided they meet the ESR requirements. The adjustable LDO (for voltages lower than 3 V) requires a bypass capacitor across the feedback resistor as shown in Figure 18. The value of this capacitor is determined by using the following equation: C f + 1 (63.7e3 2 3.14 R1) * 4pf where R1 is derived by programming the adjustable LDO (see programming the adjustable LDO regulator section shown below). (1) |
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